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๋ถ„๋ฅ˜ ์ „์ฒด๋ณด๊ธฐ

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[์ปดํ“จํ„ฐ๊ตฌ์กฐ] CH4. RISC-V & RISC-V Instruction #3 Branch ๊ณ„์‚ฐ๊ธฐ์™€ ๋‹ค๋ฅธ ์ปดํ“จํ„ฐ์˜ ์žฅ์ ์€ ์–ด๋–ค ์˜์‚ฌ๊ฒฐ์ •์„ ํ•  ์ˆ˜ ์žˆ๋Š” ๋Šฅ๋ ฅ์ด ์žˆ๋‹ค๋Š” ๊ฒƒ! ์ปดํ“จํ„ฐ๋Š” ์ƒํ™ฉ์— ๋”ฐ๋ผ์„œ ๋‹ค๋ฅธ ์ž‘์—…์„ ์ˆ˜ํ–‰ํ•  ์ˆ˜ ์žˆ๋‹ค. high-level language๋กœ 'if/else, case, while, for loops' ๋ฌธ๋“ค์ด ๋ฐ”๋กœ ์กฐ๊ฑด๋ถ€ ์ฝ”๋“œ(Conditionally execute code) ์ž„! ์›๋ž˜ PC(Program Counter)๋Š” instruction์„ ์ˆœ์„œ๋Œ€๋กœ ์‹คํ–‰ํ•˜๊ธฐ ์œ„ํ•ด์„œ ํ•œ ๋ช…๋ น์ด ๋๋‚˜๋ฉด 4์”ฉ ์ฆ๊ฐ€ํ•œ๋‹ค (๊ฐ ๋ช…๋ น ํฌ๊ธฐ๊ฐ€ 4 byte์ž„ ใ…‡ใ…‡) Branch Instruction์€ ์ฝ”๋“œ๋ฅผ ์ค‘๊ฐ„์— ๋›ฐ์–ด ๋„˜๊ฑฐ๋‚˜, ์ด์ „ ์ฝ”๋“œ๋กœ ๋Œ์•„๊ฐˆ ์ˆ˜ ์žˆ๊ฒŒ๋” PC๋ฅผ ์ˆ˜์ •ํ•  ์ˆ˜ ์žˆ๋Š” ๋ช…๋ น! Branch Instruction์—๋Š” ๋‘ ์ข…๋ฅ˜๊ฐ€ ์žˆ์Œ Conditional branch..
[์ปดํ“จํ„ฐ๊ตฌ์กฐ] CH4. RISC-V & RISC-V Instruction #2 CPU and Memory 1. ์™œ CPU๊ฐ€ memory์— ์ ‘๊ทผํ•ด์•ผ ํ•˜๋Š”๊ฐ€! ์ฒ˜์Œ์—” ๋ชจ๋“  ์ฝ”๋“œ์™€ ๋ฐ์ดํ„ฐ๋“ค์ด ๋ฉ”์ธ ๋ฉ”๋ชจ๋ฆฌ์— ์ €์žฅ๋˜์–ด ์žˆ๋‹ค CPU๋Š” ์ด ํ”„๋กœ๊ทธ๋žจ์„ ์‹คํ–‰์‹œํ‚ค๊ธฐ ์œ„ํ•ด์„œ ๋ฉ”์ธ ๋ฉ”๋ชจ๋ฆฌ์— access(read/write) ํ•ด์•ผ ํ•œ๋‹ค. ์ •๋ฆฌํ•˜์ž๋ฉด access ํ•˜๋Š” ๋ชฉ์ ์—๋Š” ๋‹ค์Œ๊ณผ ๊ฐ™์€ ๋‘ ์ด์œ ๊ฐ€ ์žˆ๋‹ค. Instruciton read : CPU๊ฐ€ memory๋กœ ๋ถ€ํ„ฐ instructions์„ ์ฝ๋Š”๋‹ค Data read/write : CPU๊ฐ€ memory๋กœ ๋ถ€ํ„ฐ ๋ฐ์ดํ„ฐ๋ฅผ ์ฝ๊ฑฐ๋‚˜, memory์— ๋ฐ์ดํ„ฐ๋ฅผ ์“ด๋‹ค. 2. Instruction Access(Read) CPU๋Š” ๋ฉ”์ธ ๋ฉ”๋ชจ๋ฆฌ์—์„œ instruction ์„ ์–ด๋–ป๊ฒŒ ์ฝ์–ด๋“ค์ด๋Š”๊ฐ€ ๋ชจ๋“  CPU๋Š” ํ˜„์žฌ ์‹คํ–‰์ค‘์ธ instruction์˜ ์œ„์น˜, ์ฃผ์†Œ๋ฅผ ๊ณ„์† ์ถ”์ ํ•˜๋Š” ํŠน..
[๋ฐ์ดํ„ฐ๋ฒ ์ด์Šค] CH3. Introduction to SQL Overview 1. History SQL Parts DML DDL Domain Types in SQL : ์Šคํ‚ค๋งˆ๋ฅผ ๊ตฌ์„ฑํ•˜๋Š” attribute ์˜ ๊ฐ€๋Šฅํ•œ type๋“ค!! char(n) : ๊ธธ์ด๊ฐ€ n์œผ๋กœ ๊ณ ์ •๋œ ๋ฌธ์ž์—ด varchar(n) : ์ตœ๋Œ€ ๊ธธ์ด๊ฐ€ n์ธ ๊ฐ€๋ณ€์ ์ธ ๋ฌธ์ž์—ด int : ์ •์ˆ˜ smallint : ์ž‘์€ ์ •์ˆ˜ numeric(p,d) : ์ „์ฒด ์ž๋ฆฌ์ˆ˜๊ฐ€ p, ์†Œ์ˆซ์  ์•„๋ž˜ ์ž๋ฆฌ์ˆ˜๊ฐ€ d์ธ ์‹ค์ˆ˜ ex) numeric(3,1)์ด๋ฉด 44.5 (0) 3.12(X) 444.5(X) real, double, precision float(n) 1. Create Table Construct create table r (A1 D1, A2 D2, ... , An Dn, (integrity-constraint1), ... ..
[๋ฐ์ดํ„ฐ๋ฒ ์ด์Šค] CH2. Introduction to Relation Model(1) superkey : tuple์„ ํŠน์ •์ง€์„ ์ˆ˜ ์žˆ๋Š” attribute ๋˜๋Š” attribute์˜ ์ง‘ํ•ฉ ๋ชจ๋‘ candidate key: primary key๊ฐ€ ๋  ์ˆ˜ ์žˆ๋Š” ํ›„๋ณดํ‚ค๋กœ, tuple์„ ํŠน์ •์ง€์„ ์ˆ˜ ์žˆ๋Š” super ํ‚ค ์ค‘ ์ตœ์†Œ์ธ ๊ฒƒ(๋ถˆํ•„์š”ํ•œ ๊ฒƒ ๋บ€ ๊ฒƒ) primary key : candidate key ์ค‘ ํ•˜๋‚˜ foreign key : ๋‹ค๋ฅธ relation์˜ pk๋ฅผ ์ฐธ์กฐํ•œ key
[๋ฐ์ดํ„ฐ๋ฒ ์ด์Šค] CH1. Introduction database systems์„ ์จ์•ผ ํ•˜๋Š” ์ด์œ  1. Data redundancy and inconsistency : ๋ฐ์ดํ„ฐ ์ค‘๋ณต ๋ฐ ๋ถˆ์ผ์น˜๋ฅผ ๋ง‰๊ธฐ ์œ„ํ•ด. ๋ฐ์ดํ„ฐ๊ฐ€ ์—ฌ๋Ÿฌ ํŒŒ์ผ ํ˜•์‹์œผ๋กœ ์ €์žฅ๋˜๋ฏ€๋กœ ์„œ๋กœ ๋‹ค๋ฅธ ํŒŒ์ผ์— ์ •๋ณด๊ฐ€ ์ค‘๋ณต๋จ 2. Difficulty in accessing data : ๋””๋น„ ์•ˆ์“ฐ๋ฉด ๋ฐ์ดํ„ฐ ์ ‘๊ทผ์ด ์–ด๋ ค์›€ 3. Data isolation : ์—ฌ๋Ÿฌ ๋ฐ์ดํ„ฐ๋ฅผ ๋…๋ฆฝ์ ์œผ๋กœ ๊ด€๋ฆฌํ•˜๊ธฐ ์œ„ํ•ด ? 4. Integrity problems : ์ œ์•ฝ์กฐ๊ฑด์„ ์ถ”๊ฐ€ํ•˜๊ฑฐ๋‚˜ ๋ฐ”๊พธ๊ธฐ ์‰ฝ๊ฒŒ ํ•˜๊ธฐ ์œ„ํ•ด 5. Atomicity of updates : ์ค‘๊ฐ„์— ์˜ค๋ฅ˜๊ฐ€ ๋‚ฌ์„ ๋•Œ ์ฒ˜๋ฆฌํ•˜๊ธฐ ์œ„ํ•ด. (์ผ๋ถ€๋ถ„๋งŒ ์—…๋ฐ์ดํŠธ๋˜์–ด inconsistent state ๋  ์ˆ˜ ์žˆ์Œ) 6. Concurrent access by multiple user..
[์ปดํ“จํ„ฐ๊ตฌ์กฐ] CH4. RISC-V & RISC-V Instruction #1 CISC VS RISC - CISC (Complex Instruction Set Computer) ํ•˜๋‚˜์˜ instruction์ด ์—ฌ๋Ÿฌ๊ฐ€์ง€ ๋ณต์žกํ•œ ์ž‘์—…์„ ํ•จ ex. move in x86 instruction์˜ ๊ธธ์ด๊ฐ€ ๊ฐ€๋ณ€์  ex. x86(Intel, AMD), Motorola 68k - RISC (Reduced Instruction Set Computer) ๊ฐ instruction์ด ํ•˜๋‚˜์˜ ์ž‘์€(unit) ์ž‘์—…๋งŒ ํ•จ. ex. add, lw, sw, beq instruction์˜ ๊ธธ์ด๊ฐ€ ๊ณ ์ •๋จ Load/Store Architecture ex. RISC-V, ARM, MIPS ์‚ฌ์‹ค ์ด ๊ทธ๋ฆผ์ด ์™œ ์—ฌ๊ธฐ ๊ทธ๋ ค์ ธ ์žˆ๋Š”์ง€ ํ–ˆ๋Š”๋ฐ ์ผ๋‹จ ์žˆ์œผ๋‹ˆ๊นŒ ์„ค๋ช…์„ ํ•ด๋ณด๋„๋ก ํ•˜์ฃ  ์˜ˆ๋ฅผ ๋“ค์–ด COPY๋ผ๋Š” ๋ช…๋ น์„ ์ˆ˜ํ–‰ํ•œ๋‹ค๊ณ  ์น˜์ž. he..
[์ปดํ“จํ„ฐ๊ตฌ์กฐ] CH3. Performance
[์ปดํ“จํ„ฐ๊ตฌ์กฐ] CH2. Instructions and High-level to Machine Code Abstraction ; ์ถ”์ƒํ™” " ๋ณต์žกํ•œ ์ž๋ฃŒ, ๋ชจ๋“ˆ, ์‹œ์Šคํ…œ ๋“ฑ์œผ๋กœ๋ถ€ํ„ฐ ํ•ต์‹ฌ์ ์ธ ๊ฐœ๋… ๋˜๋Š” ๊ธฐ๋Šฅ์„ ๊ฐ„์ถ”๋ ค ๋‚ด๋Š” ๊ฒƒ " Instruction set architecture (ISA) : ํ•˜๋“œ์›จ์–ด์™€ Low-level ์†Œํ”„ํŠธ์›จ์–ด ๊ฐ„์˜ abstraction interface ํ˜„์‹ค์—์„œ ๋”ฐ์ง€๋ฉด ๊ธฐ๊ณ„๋ฅผ ์šด์ „ํ•˜๋Š” ์‚ฌ์šฉ์ž์—๊ฒŒ ์ œ๊ณตํ•˜๋Š” '์ฐจ'๋ผ๋Š” abstraction layer ๊ฐ™์€.. Abstractions in Computer Programming using APIs : API๋ฅผ ์ด์šฉํ•ด ํ”„๋กœ๊ทธ๋ž˜๋ฐ Operating Sytems : ์šด์˜์ฒด์ œ, APIs๋ฅผ ์ œ๊ณต Instruction Set Architecture (ISA) : Assembly language or Machine language Hardware Imple..
[์ปดํ“จํ„ฐ๊ตฌ์กฐ] CH1. Computer and Technology 1. Classes of Computers ; ์ปดํ“จํ„ฐ์˜ ๋ถ„๋ฅ˜ 1) Personal computers(PC) : ๊ฐœ์ธ์šฉ ํ”ผ์”จ ์ผ๋ฐ˜์ ์ธ ๋ชฉ์  ๋ฐ์Šคํฌํƒ‘, ๋…ธํŠธ๋ถ, ๋žฉํƒ‘, ๋„ท๋ถ(?) 2) Servers ์—ฌ๋Ÿฌ ์œ ์ €๋“ค๋กœ ๋ถ€ํ„ฐ ๋” ํฐ ํ”„๋กœ๊ทธ๋žจ์„ ์‹คํ–‰์‹œํ‚ด ๋Œ€๊ฐœ ๋„คํŠธ์›Œํฌ๋ฅผ ํ†ตํ•ด ์ ‘๊ทผ ํฐ ์šฉ๋Ÿ‰, ์ข‹์€ ์„ฑ๋Šฅ๊ณผ ์•ˆ์ •์„ฑ ์ž‘์€ ์„œ๋ฒ„๋ถ€ํ„ฐ ๋นŒ๋”ฉ ํฌ๊ธฐ๊นŒ์ง€ ๋‹ค์–‘ํ•จ High-end : ์Šˆํผ ์ปดํ“จํ„ฐ๋‚˜ ๋ฐ์ดํ„ฐ ์„ผํ„ฐ์šฉ, ํ…Œ๋ผ๋ฐ”์ดํŠธ์˜ ๋ฉ”๋ชจ๋ฆฌ์™€ ํŽ˜ํƒ€๋ฐ”์ดํŠธ์˜ ์ €์žฅ์šฉ๋Ÿ‰์„ ๊ฐ€์ง€๊ณ  ์žˆ๋Š” ์ˆ˜๋ฐฑ ์ˆ˜์ฒœ๊ฐœ์˜ ํ”„๋กœ์„ธ์„œ๋“ค๋กœ ๊ตฌ์„ฑ๋จ Low-end : ์ž‘์€ ํšŒ์‚ฌ๋‚˜ ์›น ์„œ๋น™์šฉ 3) Embedded computers -> ํŠน๋ณ„ํ•œ ๋ชฉ์ ์œผ๋กœ ๋งŒ๋“ค์–ด์ง€๋Š”! ์–ด๋–ค ํŠน์ •ํ•œ ์–ดํ”Œ๋ฆฌ์ผ€์ด์…˜์„ ์‹คํ–‰์‹œํ‚ค๊ธฐ ์œ„ํ•œ ์ปดํ“จํ„ฐ๋ž„๊นŒ ex) GPS navigator, robots, car.... 2. ..
BOJ5671 : ํ˜ธํ…” ๋ฐฉ ๋ฒˆํ˜ธ (Silver 5) #include using namespace std; int main() { while (1) { int N, M; int count = 0; cin >> N >> M; if (cin.eof()) break; for (int i = N; i